TILE64 A 64 core processor for embedded devices

Tilera Corporation, a startup founded by Dr. Anant Agarwal of MIT, and financed by DARPA (Defense Advanced Research Projects Agency) and NSF (National Science Foundation) made headlines in the world of Technology with the launch of their 64 core processor. Using technology created by Dr. Anant Agarwal way back in 1996, this CPU is now on the market for embedded devices.

The processor consists of a grid of processor "tiles" arranged in a mesh network, where each tile contains a general purpose processor, cache, and a non-blocking router that the tile uses to communicate with the other tiles on the chip. The processor also contains two 10 Gb Ethernet controllers, and the capability to address over 200 GB of RAM. Tilera holds over 40 patents for its multi-core design.
According to Dr. Anant Agarwal, the brains behind this processor, "The real problem with scale is existing multi-core architectures use a bus. In that architecture, the bus is a central switch and all the cores are connected to the single central switch. A packet has to go through it no matter what, which is fine for one, two or four cores, but it does not scale. In architectures of this sort, you can keep growing and you won't have any serious congestion."

Unfortunately for us, we won't be seeing this amazing processor running our computers very soon. The processor is currently being made available only for embedded devices. Top Layer, a developer of network security and intrusion detection appliances will start using Tilera's chips in the near future.